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HF AC Millivoltmeter Adapter
Intended for use past 200 kHz, this adapter changes HF AC voltages between 2 mv P-P and 200 mv P-P
 to the corresponding DC level with linearity of better  than 1 millivolt. A on-board calibration signal aids in calibration prior to use.

Encased in a pencil box to keep the point-to-point wiring on the back of the board from shorting to wires and things on the workbench, the plastic case also holds the offset and gain post as well as the input connector and the switches that switch on the near-zero and near-full scale references.

I wanted a way to measure the current in some HF power circuits and thought it would be a 5 minute task to throw together a sufficiently linear peak detector and calibrate  it.  I was wrong. Months later, I settled on the circuit shown here.

Circuit Overview

The blocks are (left-to right) top: 2 MHz preamp, unity gain buffer, and output amplifier with gain and offset adjustment; bottom: +12 and +5 V regulators, 8 kHz oscillator, buffer with voltage multiplier to supply -3.5V to the op-amp.

Diode detectors are good at changing AC into DC, even at high frequencies. The main problem with diode detectors have inherent nonlinearities, particularly for small signals. To minimize the effects of the nonlinearities, a preamplifier boosts the amplitude of the input signal by 16X, thereby reducing the the diode detector’s nonlinearity effects by the same factor. The detector is followed by a buffer and adjustable gain stage. This last stage compensates for DC offset that results from bias on the diode detector and reduces the full scale amplitude so that the output signal DC level is equal to the input peak-to-peak value.

Power for the circuits is provided by analog regulators, and an oscillator followed by a buffer and half wave voltage multiplier provides -3.5 volts DC as the negative supply for the dual op-amp.

Input coupling and Preamp

The input net work consists of AC coupling made of a 0.047 uf capacitor and a 10 Meg resistor and transient protection. The -3 db corner of the high pass filter is 0.34 Hz. Some degree of transient protection is obtained by two back-to-back emitter-base junctions, which work a lot like back-to-back Zeners. The main difference between these and Zeners is that the reverse biased junction capacitance is lower and the knee fairly sharp, meaning that it should have no measurable effect on a 200 kHz, 200 millivolt input signal.

The input of the preamp is the gate of the 2N5485 JFET, and since the drain drives the forward-biased base-emitter junction of the 2N3906, the signal on the JFET’s drain is very small, thus there is little miller capacitance, keeping the input capacitance low.

Negative feedback thorough the 20k resistor from the collector of the 2N3906 and the source of the 2N5485 JFET stabilizes the DC operating point of both transistors and stabilizes the gain of the stage overall. I measured the gain of the one I built at 16X.

The 10K resistor was selected for the individual 2N5485 to set the DC level on the output of the stage. On the one I built, the DC level at the output is 4.7 VDC.  This resistor (10k in this schematic) may need to be changed for individual JFETs because of variation in the pinch-off voltage.

Checking with an oscilloscope, the preamp appears to flat from below 1 Hz to past 2 MHz (-3 db point). It looks like the gain is flat to within a couple of percent past 400 kHz.  If either of the semiconductors are substituted the 50 pf peaking capacitor may have to be changed. To check peaking, drive the input with a square wave and adjust the capacitor for the most “square” edge you can get without visible overshoot. If you see ringing, it is most likely because of a layout problem.

P-P Detector and Voltage Follower

The AC signal from the preamp is connected to a half-wave voltage doubler employing Schottky diodes. The doubler is just slightly forward biased to make it more linearl particularly for small singals, by the voltage divider made of 2.2k resistors and the 10 Meg resistor. The voltage divider makes 2.5 volts on the anode of D1 and the 10 Meg resistor provides a current return to ground from the cathode of D2. Since the 10 Meg resistor is so large, the current through the diodes is very small, meaning that the forward voltage of D1 and D2 is also very small. The current is about 250 nanoamps. From this we would normally subtract the input bias current of the of-amp, but since at room temperature the input bias current of a TL062 is a couple hundred nanoamps, it can be neglected. It should be pointed out that with the very large load of 10 Meg Ohms and a large bias voltag source (2.5V), the current through the diode will not change significantly with signal levels of a couple hundred millivolts, and I think this contributes to the excellent linearity.

The bias improves the linearity of the detector a lot. Above is a plot of output signal error, with the circuit output normalized to the input, as a function of the expected input signal amplitude for both an unbiased detector and the nearly zero biased detector used in this circuit.  The signal path includes the entire circuit from preamp through gain control. The “expected input signal amplitude is the P-P voltage calculated to be at each tap on a voltage divider as show in the section below under Calibration, based on the marked values of the resistors used and the amplitude of the square wave used to drive the divider. The signal was measured at the DC output of the circuit and the gain and offset adjusted using a spreadsheet with the points near 2 millivolts and 200 millivolts adjusted for accuracy by using the offset and gain adjustments, respectively.

The chart above is the output error in millivolts as a function of the P-P input voltage. Note that there is a preamp with a gain of 16X just ahead of the detector, so I would expect the bare detector, without the 16X preamp, to have much larger errors.

Here is the raw data:

Ideal         250 na bias    bias shorted
0.19605       0.198          0.066
0.1486        0.1495         0.0169
0.10058       0.1006        -0.0299
0.0525        0.0521        -0.0772
0.004515      0.004         -0.1177
0.00225       0.0023        -0.1186

The output of the half wave voltage doubler is filtered by the .047 uf capacitor and 10 Meg resistor, resulting in a time constant of 0.47 seconds.

A unity gain voltage follower (op amp pins 1,2, and 3) isolates the buffer from the output amplifier.

Output Amplifier

The signal from the P-P Detector has a DC offset as a result of the 2.5 volt bias voltage and is not properly scaled because of the gain of the preamp stage. The output stage’s purpose is to compensate for the offset and gain so that the voltage measured on the DC output of the circuit corresponds directly to the peak-to-peak input voltage of the signal being measured.  For example, if a 123 millivolt peak-to-peak sine wave is applied to the input, the DC output voltage should be 123 millivolts DC.

The output amplifier is connected as a differential amplifier with an adjustable offset Adjusting R1 adds current into the inverting input of the op-amp. A side effect of this way of adding offset is that changing offset affects gain slightly, but it saves an op-amp. A remote or panel mounted offset control can be connected R3. If the 

A remote or panel-mounted offset trim signal can be connected through R4. At this writing, this input has been tested but it is not being used.

 R2 adjusts the scale of the output voltage so that the output voltage agrees with the input signal’s P-P amplitude. This results in a output resistance of between 0 and 5k Ohms. As long as the output is connected to a high impedance load, such as a 1 Meg Ohm DVM input, the output resistance would not be important. But when using with much lower resistance loads, such as when calibrating on a 1 Meg Ohm DVM then trying to use the detector with a 1,000 Ohm per volt moving coil meter would result in significant errors.

A remote or panel mounted gain trim adjustment can be made through R3. This could be in the form of 1 Meg Ohm rheostat (potentiometer with only the wiper and one leg connected) to ground. This input has been tested but at this writing, it is not being used.

Power supply and Reference Signal

The circuit needs +12 volts. +5 volts, and -3.5 volts in order to operate. The positive voltages are provided by analog monolithic regulators powered from the +15 volt input. The -3.5 volt power supply is made with a half-wave voltage doubler that derives its power from the +5 volt supply.

The 74HCT14 Schmitt Trigger oscillator generates pulses at about 8 kHz. This particular chip from Philips has a an approximately 80% duty cycle output. The output of the oscillator connects to three parallel inverters that drive a half-wave voltage multiplier, which makes the -3.5 volts for the negative power supply of the op-amp.

The output of the oscillator is also fed to a voltage divider made with a string of resistors in series; 100k, 4.7k, and 47 Ohms to ground. A low 100 kHz pass filter formed by the first 10k resistor and 150 pf capacitor rounds off the edges of the pulses to minimize the chance for overshoot that could result from the point-to-point wiring of the board. The taps on the divider provide reference signals of about 216 mv P-P and 22 mv P-P that are used to calibrate the adapter prior to use.


Linearity testing and calibration of the circuit was based on the the circuit shown above. A frequency divider is driven from a CMOS counter's 7.125 kHz output. The voltage at the taps was calculated based on the assumption that the resistors are ideal and there was no significant ringing on the waveform at the taps. A 100 pf capacitor across the lower 4092 Ohms of the divider rolls the circuit off at 400 kHz to help control high frequency overshoot on the pulse edges.

The offset pot on the board were adjusted by first making sure the internal references are not connected, then connecting a digital voltmeter to the board's output, putting the Hi and Lo Adjust front panel post to the center of their ranges, connecting the input of the board to the 2.25 millivolt calibration signal and then adjusting the offset pot to obtain a reading of 2.3 millivolts.

Then, the input of the board is connected to the 196.5 mv calibration voltage and the gain control on the circuit board is adjusted to obtain a reading of 196.5 millivolts.

The offset is then checked and adjusted, and then the gain pot is checked and adjusted as above. This procedure is repeated until the adjustment is not needed when moving the input between the 196.5 millivolt and the 2.25 millivolt calibration signals.

A built-in signal source provides high and low level reference signals necessary to adjust the HI ADJ and LO ADJ controls on the adapter prior to everyday use. Before they can be used, the reference signals need to be measured. To do this, the adapter is calibrated as described above, then the nominally 2.2 millivolt reference is switched in and the resulting DC output is measured and recorded for later use, hen the nominally 2.2 millivolt reference is switched out and the nominally 216 millivolt reference is switched in and the DC output is measured and recorded for later use. For example, on the one I built, the 2.2 mv nominal output reference measured 1.9 millivolts and the 216 millivolt reference measured 192.6 millivolts.

To adjust the HI ADJ and LO ADJ controls, the 2.2 millivolt reference signal is switched in and the LO ADJ control is adjusted -in the case of the one I built, to obtain 1.9 millivolts out. Then, the 2.2 millivolt reference is switched out and the 216 millivolt reference is switched in and the HI ADJ control is adjusted -in the case of the one I built, to obtain 192.6 millivolts out. A second, and perhaps a third iteration may be necessary if the adjustments were way off to start with.


Layout is important with much of the circuit.  Minimize parasitic capacitance between the CMOS oscillator/ power supply and the analog section, particular around the 2N5485 JFET and the input circuit. Try to keep the decouping capacitors as close to the 74HCT14 as possible. Keep the capacitors in the preamp circuit close to the circuit itself and keep the leads for the three grounded capacitors in that circuit back to a single point before connecting to other grounds. This single point should also be the ground for the input signal and the reference voltage divider.  

The DC level at the output of the first buffer (op-amp pin 1) should be about 2.5 VDC when the input is grounded. If it is much more than than, look for noise getting into the preamp from the 74HCT14 or oscillation in the preamp itself.

[Key words: Audio millivoltmeter, RF millivoltmeter, Schottky detector, RF detector, Schottky linearity.]

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Contents ©2005 Richard Cappels All Rights Reserved. http://www.projects.cappels.org/

First posted in March, 2005

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