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Real Time Clock/Calendar/Alarm with Interpreter for battery backed-up and battery powered operation with DS interface.
Based on the Atmel ATtiny12L-4PI microcontroller -A real Time Clock/Calendar for less than US$1.50 in moderate quantity.
This is the timekeeping test circuit. It includes a one-transistor circuit to switch in the 5V power supply when present and drop back to the 3v battery the rest of the time. That loop of blue wire-wrapping wire is a lariat used to quickly and easily pull the chip out of the socket during development without damage and without having to reach for the removal tool.
• Low current operation (chip sleeps most of the time)
• Alarm and external event triggered interpreter operation
• Capable of stand-alone timer and alarm use. No additional processor required once programmed.
• One external input pin and one open drain output pin for interpreter
AVRStudio Hex file for clock CV0011.hex
This documentation printed to .PDF format t12clock.pdf
Short form programming and reference guide dscmap.pdf
AVR STudio source 02.11.10 V0011.asm
After programming, you must:
1. Select the Low Frequency Crystal oscillator 67ms + 32k clock, and
2. Disable Reset to free up pin 1 as open drain output.
You might want to enable brownout detection if the EEPROM is important in your application, but be aware that activating brown out detection will increase current drain.
The clock is based on the Atmel ATtiny12 processor which is ideal for this kind of application because of its low current drain when clocked by a 32768 Hz crystal.
Functional block diagram
A DS interface allows access to a register file, EEPROM, and an instruction interpreter. A separate interpreter interprets instructions stored in the EEPROM. EEPROM interpreter operation can be initiated by a clock/calendar alarm, an external event, or by command via the DS interface. The register set plays a central role in moving information between the DS interface and the clock and EEPROM interpreter. One external input can be sampled by the interpreter and one external open drain output can be driven by the interpreter
The clock's output can be read from registers 3 through 8, but writing to these registers does not affect the clock unless the "write time buffers to clock" flag is set in the control register (register $0F). See the Register Assignments section for more detail.
It should be noted that this application of the DS Inteface has a time-out period of 1 to 2 seconds for both send and receive. This prevents the inteface from hanging up in applicatoins in which the DS Interface pins are exposed to shorts on in which DS Interface transactions are interrupted. It also puts contstraints on the response time of the host. As an example, to read the control register, the read comamnd ($1F) must be sent, and the host must respond to the clock's signal for attention within two seconds, or the transaction will be abandoned and the interface reset.
Timekeeping test circuit
Be sure to read the electrical specifications in the Atmel ATtiny12 data sheet. One thing to keep in mind is that the open drain output on pin 1 should not be allowed to be pulled more than a few hundred millivolts above VCC (pin 8) because this might damage the chip or trigger the reset circuit.
Note that the 32768 watch crystal connects directly to the ATtiny12's pins without any capacitors or other components needed. The drive power to the crystal is very low -on the order of a micro watt I believe, so probing the crystal connections with a voltmeter, scope probe, or someone's fingers is likely to stop the oscillator.
The timekeeping test fixture shown above allows the clock/calendar chip to run from a battery most of the time, and automatically switch to +5V when it is plugged into the DS Interface Tool. When the voltage applied to the connector is more than about a volt above the battery voltage, sufficient base current appears in the PNP transistor to saturate it. This circuit is also suitable for use in situations in which a battery backed up clock/calendar chip is on the same PC board as a host processor. The PNP transistor can be a 2N2907 or similar. Whatever transistor you choose, pay attention to the low current beta. Current flows through the 1K resistor to supply the ATtiny12 when operating from the battery, and current flow the other way to trickle charge the battery when external power is applied through the connector. This creates an interesting set of design tradeoffs and in the end, the maximum trickle charge current may narrowly limit your choices of transistor betas.
The 100k resistor provides a pull-up on pin 1, which has not active pull-up of its own, to facilitate monitoring of the digital output.
The 470 k resistors hold the inputs low when the test circuit is not plugged into the DS Test tool. Letting these inputs float is a bad idea in current sensitive situations since floating inputs can easily double this chips' current drain.
Sometimes real life results are more inspiring than specifications. After running continuously for two months on the test fixture above, this circuit agreed to within 2 minutes (400 parts per billion) with my very expensive ($35) Casio watch. I used some almost-dead penlight cells that would no longer run my CD player for the experiment, so its been running from 2.4 volts and the battery voltage has not declined noticeably the last three months. On this particular board, the voltage drop across the 1 k resistor is only about 6 millivlots!
NEXT PART (click) CLOCK/CALENDAR/ALARM
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