;******************************************************
; 38 kHz switching and 19 kHz pilot carrier generator for FM stereo modulator.
	
;******************************************************
.nolist						;Don't list  defitiions 
.include "2313def.inc"  
.list
;******************************************************

;st2313v070419b  This code tested on AT90S2313 and ATTINY2313.


;************* MEMO OF I/O PORT ASSIGNMENTS *************

;Port B pin assignments
	;B0		Comparitor + input		INPUT	with pullup.	
	;B1		Comparitor - input		INPUT	with pullup.
	;B2		input with pullup
	;B3		input with pullup
	;B4		input with pullup
	;B5		input with pullup
	;B6		input with pullup
	;B7		input with pullup


;PORT D pin assignments
	;D0		input with pullup
	;D1		input with pullup
	;D2		input with pullup
	;D3		input with pullup
	;D4		inverted 38 kHz switch to ground.	
	;D5		19 kHz output
	;D6		38 KHz switch to ground.	
	;D7


;************* DEFINE FEGISTER USAGE *************
.def	temp =	r16						 	;Working register.
				

;************* ESTABLISH CONSTANTS ************* 

	.equ	ISwitch38	= 4				;Bit 4 on PORTD is the inverted 38 kHz switch to ground.
	.equ	Switch38 	= 6				;Bit 6 of PORTD will have 38 kHz switch to ground.
	.equ	Sig19 		= 5				;Bit 5 of PORTD is the 19 kHz pilot signal.


;************* START EXECUTABLE CODE ************* 

.org $0000
	rjmp 	start    				;Vector not needed but it is here for uniformity of implimentation.


;.db	"0000PUT_VERSION_HERE0000"

start:									;COMES HERE AFTER POWER-ON RESET
	ldi 	r16,RAMEND      		;Init Stack Pointer
	out 	SPL,r16
	ldi		temp,$FF				;Initialize I/O
	out		DDRB,temp
	ldi		temp,0b111111111
	out		DDRD,temp
	ldi		temp,0					;Make all of PORTD pins outputs. Switch38 and ISwitch38 will toggle between input and output later.
	out		PORTB,temp
	out		PORTD,temp
	
		
main:									;Start main loop - generate 38 kHz switching and 19 kHz signal.							

				
	sbi PORTD,Sig19						;2 cycles	19 kHz high
	cbi	DDRD,Switch38					;2 cycles	38kHz open
	sbi	DDRD,ISwitch38					;2 cycles	Inverted 38 kHz closed
	ldi	temp, 24										
dly1:	
	dec temp
	brne dly1
	nop
	nop
	nop
	sbi	DDRD,Switch38					;2 cycles   38 kHz closed
	cbi	DDRD,ISwitch38					;2 cycles	Inverted 3 kHz open


									
	ldi	temp,23										
dly2:	
	dec temp
	brne dly2
	nop
	nop
	nop
	nop

	cbi PORTD,Sig19						;2 cycles	19 kHz low
	cbi	DDRD,Switch38					;2 cycles   38 kHz open
	sbi	DDRD,ISwitch38					;2 cycles	Inverted 38 kHz closed
	nop

	ldi	temp, 24										
dly3:	
	dec temp
	brne dly3
	nop
	nop
	sbi	DDRD,Switch38					;2 cycles   38 kHz closed
	cbi	DDRD,ISwitch38					;2 cycles	Inverted 3 kHz open

									
ldi	temp, 23										
dly4:	
	dec temp
	brne dly4
	nop
	nop	
	rjmp	main;						;2 Cycles


	


	
.exit									;Assembler will stop at this line.